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zhaizhongbing723@gmail.com
FPGA software underlying module embedded development + hardware development board design and selection + image filtering algorithm development is one of the FPGA projects we delivered, which is jointly developed with a platform laboratory.
Combined with the experience of Party A’s platform in the use scene and the familiarity of the verification standard, you will create the accurate reproduction of the products produced by the customer according to the requirements of the scene based on the relevant information. The reason for choosing this project as the introduction is that it is in the FPGA development section of our company, and the development content is relatively comprehensive.
The embedded bottom module is mainly composed of interface communication, signal input and output, driver, system on chip, network port, upgrade and other parts. Dual DSP TMS320C6713BGDPA200+fpga EP2S30F672I4N chip is used for screen processing. The second block EP2S30F672I4N is used to process sensor data. Input DVI signal, using TFP401AMPZPEP, DS16EV5110ASQE for conditioning DVI signal.
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